Multilayer HDI PCB Fabrication EM370D Printed Circuit Board Custom
Product Specifications
Attribute |
Value |
Raw Material |
EM370(D) |
Min. Solder Mask Clearance |
0.08mm |
Hole Tolerance |
PTH: ±3mil NPTH: ±2mil |
PCB Kind |
HDI PCB |
Product Name |
FR4 PCB prototype machine |
Peelable Mask |
0.3-0.5mm |
Silkscreen |
White, Black, Yellow |
Blind Hole |
L2-L3 0.2MM |
8 Layer Multilayer HDI PCB with Blind Vias
General Information
Layers: 8
Material: FR4
Thickness: 2.0MM
Surface finish: ENIG
Special features: Blind hole (L1-L2, L3-L4, L5-L6), vias filled and capped
Board size: 2×6CM
Solder mask: No
Silk screen: White
Delivery time: 10 days for sample and small/medium batch
Packaging: Inner vacuum packing/plastic bag, outer standard carton packing
Blind Vias Technology
Blind vias connect one outer layer with at least one inner layer. Each connection level requires a separate drill file. The aspect ratio (hole depth to drill diameter) must be ≤ 1. The smallest hole determines the maximum distance between outer and corresponding inner layers.
Keywords: Microvia, Via-in-Pad
HDI PCB Technology
HDI boards represent one of the fastest growing PCB technologies, featuring blind/buried vias and microvias (≤0.006 diameter) for higher circuit density than traditional boards. Six HDI board types include:
- Through vias from surface to surface
- With buried vias and through vias
- Two or more HDI layers with through vias
- Passive substrate with no electrical connection
- Coreless construction using layer pairs
- Alternate coreless constructions
Special HDI Technologies
- Edge plating for shielding and ground connection
- 40μm minimum track width/spacing in mass production
- Stacked microvias (plated copper or conductive paste filled)
- Cavities, countersunk holes, and depth milling
- Multi-color solder resist options
- Low-halogen materials in standard and high Tg range
- Low-DK materials for mobile devices
- All industry-standard PCB surfaces available
HDI PCB Design Guidelines
Stitching Vias/Ground Vias Implementation:
- Determine optimal via spacing based on frequency requirements
- Place vias regularly along signal traces for effective coupling
- Connect vias directly to solid ground plane without interruptions
- Select appropriate via diameter and aspect ratio
- Minimize via stub lengths using blind/buried vias
- Consider ground via arrays for enhanced isolation
- Perform signal integrity analysis and simulations
Characteristic Impedance Calculation
Two primary methods for determining transmission line impedance:
1. Empirical Formulas:
Microstrip formula: Zc = (87/√εr) × log(5.98h/W + 1.74b/W)
Where Zc=impedance, εr=dielectric constant, h=dielectric height, W=trace width, b=ground plane separation
2. Field Solver Simulations:
For precise results, use specialized tools (Ansys HFSS, CST Studio Suite, Sonnet) that account for layer stackup, trace geometry, and material properties.
Automotive Electronics Challenges
Implementing HDI PCBs in automotive applications presents several challenges:
- Reliability: Must withstand temperature variations, vibrations, and moisture
- Signal Integrity: Managing crosstalk and impedance in high-density designs
- Thermal Management: Effective heat dissipation in compact designs
- Manufacturing Complexity: Tight tolerances and specialized processes
- Cost Considerations: Balancing advanced features with production expenses
- Regulatory Compliance: Meeting stringent automotive standards